/*******************************************************************************
*                                    ZLG
*                         ----------------------------
*                         innovating embedded platform
*
* Copyright (c) 2001-2021 Guangzhou ZHIYUAN Electronics Co., Ltd.
* All rights reserved.
*
* Contact information:
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*******************************************************************************/
#ifndef __HC32F4A0_SRAM_H
#define __HC32F4A0_SRAM_H

#ifdef __cplusplus
extern "C" {
#endif  /* __cplusplus*/
#include "hc32f4a0_regs_sram.h"

/* \brief 检查等待周期*/
#define IS_SRAM_CYCLE(x)        \
(   ((x) <= SRAM_WAIT_CYCLE_7))

/* \brief SRAM 配置位*/
#define SRAM_ECC_MODE_MSK           (SRAMC_CKCR_ECCMOD)
#define SRAM_CYCLE_MSK              (SRAMC_WTCR_SRAM123RWT)

/**
 * \brief SRAM 等待寄存器写保护
 */
static inline void sram_wtcr_lock(void){
    WRITE_REG32(HC32F4A0_SRAM->WTPR, SRAM_LOCK_CMD);
}

/**
 * \brief SRAM 等待寄存器写使能
 */
static inline void sram_wtcr_unlock(void){
    WRITE_REG32(HC32F4A0_SRAM->WTPR, SRAM_UNLOCK_CMD);
}

/**
 * \brief SRAM 校验控制寄存器写保护
 */
static inline void sram_ckcr_lock(void){
    WRITE_REG32(HC32F4A0_SRAM->CKPR, SRAM_LOCK_CMD);
}

/**
 * \brief SRAM 校验控制寄存器写使能
 */
static inline void sram_ckcr_unlock(void){
    WRITE_REG32(HC32F4A0_SRAM->CKPR, SRAM_UNLOCK_CMD);
}

/**
 * \brief 设置 SRAM 等待周期
 *
 * \param[in] sram_idx    要设置的 SRAM 索引
 * \param[in] write_cycle 写等待周期
 * \param[in] read_cycle  读等待周期
 *
 * \retval 成功返回OK
 */
int sram_wait_cycle_set(uint32_t sram_idx, uint32_t write_cycle, uint32_t read_cycle);

#ifdef __cplusplus
}
#endif  /* __cplusplus  */

#endif

